64-bit netburst Xeon

• Nocona
• Introduced 2004

• Irwindale
• Introduced 2004

• Cranford
• Introduced April 2005
• MP version of Nocona

• Potomac
• Introduced April 2005
• Cranford with 8 MB of L3 cache

• Paxville DP (2.8 GHz)
• Introduced October 10, 2005
• Dual-core version of Irwindale, with 4 MB of L2 Cache (2 MB per core)
• 2.8 GHz
• 800 MT/s front side bus

• Paxville MP - 90 nm process (2.67 - 3.0 GHz)
• Introduced November 1, 2005
• Dual-Core Xeon 7000 series
• MP-capable version of Paxville DP
• 2 MB of L2 Cache (1 MB per core) or 4 MB of L2 (2 MB per core)
• 667 MT/s FSB or 800 MT/s FSB

• Dempsey - 65 nm process (2.67 - 3.73 GHz)
• Introduced May 23, 2006
• Dual-Core Xeon 5000 series
• MP version of Presler
• 667 MT/s or 1066 MT/s FSB
• 4 MB of L2 Cache (2 MB per core)
• Socket J, also known as LGA 771.

• Tulsa - 65 nm process (2.5 - 3.4 GHz)
• Introduced August 29, 2006
• Dual-Core Xeon 7100-series
• Improved version of Paxville MP
• 667 MT/s or 800 MT/s FSB